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← All SystemsSystem 05 / fabricationReviewed Aug 29, 2026

Fabs & Yield

A fab converts recipes, tools, utilities, and disciplined operations into good dies—not merely processed wafers.

Understand the system

How it works

The scarce output of a fab is yield-adjusted, qualified silicon, created through thousands of tightly coupled process and control steps.

Production dependencies

From fabrication to usable output

Select a capability to explore its role and connections.

Selected: Wafer process tools

Wafer process tools

Deposition, etch, clean, implant, polish, thermal, and material-handling equipment.

Explore Wafer process tools in Atlas

Documented connections

Selected documented dependencies. Arrows retain their Atlas direction; they do not represent quantities or a complete engineering process.

A leading-edge fab is both precision laboratory and high-volume plant. Wafers move through cleanrooms for weeks while automated material handling, process tools, chemical delivery, ultrapure water, gases, power, vibration control, and data systems hold narrow operating windows. The decisive metric is not wafer starts alone but good dies delivered at target performance, reliability, cost, and schedule.

A long recursive process

Yield is the economic multiplier

Defect density, parametric variation, die area, redundancy, and test determine good dies per wafer. Learning curves can matter as much as nominal process capability.

  • Good-die output matters more than raw wafer starts
  • Defect learning changes yield over time
Supporting evidence · 2
  1. [1] Inspection, metrology, and data analysis form a feedback loop used to detect defects and control semiconductor yield.
  2. [2] ASML specifies a 0.55 numerical aperture and 8 nm resolution for the TWINSCAN EXE:5000 High-NA EUV system.

Utilities are process inputs

Capacity takes years to earn

Construction, tool move-in, process qualification, customer qualification, and yield ramp are separate milestones. Policy funding can accelerate investment, but it cannot skip technical learning.

  • Shell, tools, qualification, and yield mature on different clocks
  • Announced spending is not usable output
Supporting evidence · 2
  1. [1] Intel characterizes a modern fab as an investment of roughly 10 billion dollars that can take three to five years to build.
  2. [2] The U.S. CHIPS and Science Act provides 52.7 billion dollars over five years, including 39 billion dollars for manufacturing incentives and 11 billion dollars for R&D.

Featured evidence

Selected final CHIPS direct-award ceilings

NIST's final-award records list these maximum direct funding amounts. They are award ceilings—not company capital expenditure, cash disbursed to date, installed wafer capacity, production output, or comparable project scope. Map logic, memory, analog, power, and packaging capability separately because nominal wafer capacity is not automatically substitutable.
Final direct awardUSD billions
View chart values
Selected final CHIPS direct-award ceilings — underlying values in USD billions
CategoryFinal direct award
Intel$7.87B USD billions
Samsung$4.75B USD billions
Micron$6.17B USD billions

Data status: final direct-award ceilings. Compare project geography, technology, milestones, private spend, and operating dates separately.

Key indicators

Key measures & constraints

  1. 01

    Intel describes a representative advanced fab as containing about 1,200 production tools plus 1,500 utility-support tools.

    Class
    vendor claim
    Geography
    Global
    Period
    2023 representative fab
    Confidence
    medium
    Trace evidence
  2. 02

    Leading-edge wafers pass through thousands of fabrication process steps over a period measured in weeks before packaging and test.

    Class
    vendor claim
    Geography
    Global
    Period
    2025 manufacturing practice
    Confidence
    medium
    Trace evidence
  3. 03

    Final CHIPS project records describe up-to direct-funding ceilings of $7.865 billion for Intel, $4.745 billion for Samsung, and $6.165 billion for Micron; disbursement remains milestone-based and the amounts are not spend-to-date or operating capacity.

    Class
    fact
    Geography
    United States
    Period
    Final awards announced November–December 2024
    Confidence
    high
    Trace evidence

System map

Connections across the system

Explore inputs, outputs, and shared capabilities in the Atlas. Open the register for every documented relationship.

Across the system boundary Selected documented relationships · arrows follow the Atlas

Enters this system 8

  1. Project capital→ Leading-edge fabTrace relationship
  2. Polysilicon & wafers→ Leading-edge fabTrace relationship

Leaves this system 5

  1. Advanced packaging← Yield learningTrace relationship
  2. Advanced packaging← High-bandwidth memoryTrace relationship
System 05Fabs & Yield8 internal relationships

Shared capabilities can belong to more than one System. These links carry materials, energy, information, capital, or permissions; they describe dependencies, not quantities or a complete process model.

Explore 9 capabilities and operating boundaries
Atlas nodes / 9
All documented relationships · 21
  1. criticalinput
    Project capitalLeading-edge fab

    Long-duration capital funds fab construction, tools, and ramp.

    Trace relationship
    Supporting evidence · 1
    1. [1] Intel characterizes a modern fab as an investment of roughly 10 billion dollars that can take three to five years to build.
  2. criticalinput
    Polysilicon & wafersLeading-edge fab

    Qualified silicon wafers are the physical starting substrate for fabrication.

    Trace relationship
    Supporting evidence · 2
    1. [1] Semiconductor-grade polysilicon generally requires purity of at least eleven nines, far beyond ordinary industrial silicon.
    2. [2] SIA reported that Wacker and Hemlock together supply roughly three quarters of global semiconductor-grade polysilicon.
  3. criticalinput
    Specialty chemicalsLeading-edge fab

    Qualified chemicals repeatedly add, pattern, clean, and remove wafer layers.

    Trace relationship
    Supporting evidence · 1
    1. [1] Leading-edge wafers pass through thousands of fabrication process steps over a period measured in weeks before packaging and test.
  4. criticalinput
    EUV lithographyLeading-edge fab

    EUV tools pattern selected advanced layers within the fab process flow.

    Trace relationship
    Supporting evidence · 2
    1. [1] EUV lithography uses light with a wavelength of 13.5 nanometers to pattern advanced semiconductor layers.
    2. [2] ASML's EUV source strikes approximately 50,000 microscopic tin droplets each second to generate EUV light.
  5. criticalinput
    Wafer process toolsLeading-edge fab

    Process tools deposit, etch, clean, modify, and polish wafer layers.

    Trace relationship
    Supporting evidence · 2
    1. [1] Intel describes a representative advanced fab as containing about 1,200 production tools plus 1,500 utility-support tools.
    2. [2] Leading-edge wafers pass through thousands of fabrication process steps over a period measured in weeks before packaging and test.
  6. criticalinput
    Process controlYield learning

    Inspection and metrology data drive excursion control and yield learning.

    Trace relationship
    Supporting evidence · 1
    1. [1] Inspection, metrology, and data analysis form a feedback loop used to detect defects and control semiconductor yield.
  7. criticalinternal
    Leading-edge fabYield learning

    Stable process execution converts installed capacity into good dies.

    Trace relationship
    Supporting evidence · 2
    1. [1] Leading-edge wafers pass through thousands of fabrication process steps over a period measured in weeks before packaging and test.
    2. [2] Inspection, metrology, and data analysis form a feedback loop used to detect defects and control semiconductor yield.
  8. criticaloutput
    Yield learningAdvanced packaging

    Known-good logic dies enter high-value package assembly.

    Trace relationship
    Supporting evidence · 2
    1. [1] TSMC's CoWoS platform integrates logic chiplets and high-bandwidth memory on an interposer within an advanced package.
    2. [2] Inspection, metrology, and data analysis form a feedback loop used to detect defects and control semiconductor yield.
  9. criticaloutput
    High-bandwidth memoryAdvanced packaging

    Qualified HBM stacks are bonded beside logic in advanced packages.

    Trace relationship
    Supporting evidence · 2
    1. [1] Micron specifies more than 1.2 TB/s of memory bandwidth per HBM3E stack.
    2. [2] TSMC's CoWoS platform integrates logic chiplets and high-bandwidth memory on an interposer within an advanced package.
  10. criticaloutput
    High-bandwidth memoryAI accelerator

    Memory capacity and bandwidth bound accelerator workload performance.

    Trace relationship
    Supporting evidence · 2
    1. [1] Micron specifies more than 1.2 TB/s of memory bandwidth per HBM3E stack.
    2. [2] NVIDIA specifies 141 GB of HBM3E capacity and 4.8 TB/s of memory bandwidth for the H200 accelerator.
  11. criticalinternal
    Fab utilitiesLeading-edge fab

    Qualified water, gases, chemicals, power, and abatement sustain production-tool availability.

    Trace relationship
    Supporting evidence · 2
    1. [1] NIST's representative synthesis for a 29-fab sample allocates semiconductor-fab water demand as 48 percent process, 23 percent cooling, 20 percent abatement, and 9 percent ultrapure-water treatment loss, with less than 1 percent nonindustrial use.
    2. [2] Intel describes a representative advanced fab as containing about 1,200 production tools plus 1,500 utility-support tools.
  12. criticalinternal
    Memory fabricationHigh-bandwidth memory

    Qualified DRAM dies from memory fabs become the active layers of HBM stacks.

    Trace relationship
    Supporting evidence · 2
    1. [1] SK hynix described its March 2025 12-layer HBM4 customer sample as a 36 GB stack; the announcement documented sample and certification status rather than qualified volume production.
    2. [2] Micron lists HBM3E configurations of 24 GB in an eight-high stack and 36 GB in a twelve-high stack.
  13. importantoutput
    Water systemLiquid cooling

    Water availability and cooling architecture shape heat-rejection options.

    Trace relationship
    Supporting evidence · 1
    1. [1] LBNL estimated average U.S. data-center site water usage effectiveness at just over 0.36 liters per kWh through 2023.
  14. importantinput
    Export controlsHigh-bandwidth memory

    Export rules can restrict advanced memory products and related technology.

    Trace relationship
    Supporting evidence · 1
    1. [1] The December 2024 U.S. package added controls on 24 categories of semiconductor manufacturing equipment, three software-tool categories, and HBM, plus 140 Entity List additions.
  15. importantinternal
    Skilled workforceLeading-edge fab

    Specialized engineering and technician capability enables ramp and operations.

    Trace relationship
    Supporting evidence · 2
    1. [1] Intel describes a representative advanced fab as containing about 1,200 production tools plus 1,500 utility-support tools.
    2. [2] The U.S. CHIPS and Science Act provides 52.7 billion dollars over five years, including 39 billion dollars for manufacturing incentives and 11 billion dollars for R&D.
  16. importantoutput
    Skilled workforceData-center campus

    Skilled trades, commissioning, controls, and operations turn assets into capacity.

    Trace relationship
    Supporting evidence · 2
    1. [1] Global investment in data centers reached roughly half a trillion U.S. dollars in 2024, nearly double the 2022 level.
    2. [2] Open Compute Project workstreams are addressing future AI rack power envelopes from 250 kW toward 1 MW alongside liquid-cooling standards.
  17. importantinternal
    Mature & control-node fabsLeading-edge fab

    Mature & control-node fabs supplies a distinct operating capability within its broader Atlas system.

    Trace relationship
    Supporting evidence · 2
    1. [1] SIA's high-level semiconductor value chain runs from research and development through chip design, front-end wafer fabrication, back-end assembly, test and packaging, and finally circuit-board integration into products.
    2. [2] Intel characterizes a modern fab as an investment of roughly 10 billion dollars that can take three to five years to build.
  18. importantinternal
    Memory fabricationLeading-edge fab

    Memory fabrication supplies a distinct operating capability within its broader Atlas system.

    Trace relationship
    Supporting evidence · 2
    1. [1] SK hynix described its March 2025 12-layer HBM4 customer sample as a 36 GB stack; the announcement documented sample and certification status rather than qualified volume production.
    2. [2] Final CHIPS project records describe up-to direct-funding ceilings of $7.865 billion for Intel, $4.745 billion for Samsung, and $6.165 billion for Micron; disbursement remains milestone-based and the amounts are not spend-to-date or operating capacity.
  19. importantinternal
    Fab utilitiesLeading-edge fab

    Fab utilities supplies a distinct operating capability within its broader Atlas system.

    Trace relationship
    Supporting evidence · 2
    1. [1] NIST's representative synthesis for a 29-fab sample allocates semiconductor-fab water demand as 48 percent process, 23 percent cooling, 20 percent abatement, and 9 percent ultrapure-water treatment loss, with less than 1 percent nonindustrial use.
    2. [2] Intel describes a representative advanced fab as containing about 1,200 production tools plus 1,500 utility-support tools.
  20. importantinternal
    Wafer probe & qualificationYield learning

    Wafer probe & qualification supplies a distinct operating capability within its broader Atlas system.

    Trace relationship
    Supporting evidence · 2
    1. [1] Inspection, metrology, and data analysis form a feedback loop used to detect defects and control semiconductor yield.
    2. [2] SIA's high-level semiconductor value chain runs from research and development through chip design, front-end wafer fabrication, back-end assembly, test and packaging, and finally circuit-board integration into products.
  21. enablinginput
    Industrial policyLeading-edge fab

    Incentives and research programs alter fab economics and geography.

    Trace relationship
    Supporting evidence · 2
    1. [1] The U.S. CHIPS and Science Act provides 52.7 billion dollars over five years, including 39 billion dollars for manufacturing incentives and 11 billion dollars for R&D.
    2. [2] The European Chips Act sets a policy goal of doubling the EU share of global semiconductor production to 20 percent by 2030.

Named companies + institutions

Organizations & their roles

  1. principal · public company

    GlobalFoundries

    GlobalFoundries Inc.

    Semiconductor foundry focused on differentiated process technologies and geographically distributed manufacturing.

    Roles, locations & evidence
    Role
    manufacturer
    Products / service
    Operating 200 mm and 300 mm differentiated semiconductor fabrication · Differentiated foundry manufacturing · Specialty and mature-node foundry services
    Documented activity
    Singapore · World · United States · Europe · Asia
    Headquarters
    Not cataloged
    Why this organization belongs in the System
    • Mature & control-node fabs

      GlobalFoundries' opening announcement directly identifies its Singapore fabrication role and expansion module.

    • Leading-edge fab

      GlobalFoundries's filing-backed operating portfolio includes differentiated foundry manufacturing; no subregional operating place is asserted, and headquarters is not used as a proxy. Representative status does not imply market rank.

    • Mature & control-node fabs

      GlobalFoundries's filing-backed operating portfolio includes specialty and mature-node foundry services; the listed places are explicit role geographies, and headquarters is not used as a proxy. Representative status does not imply market rank.

  2. material · public company

    KLA

    KLA Corporation

    Process-control company supplying inspection, metrology, analytics, and related service for semiconductor production.

    Roles, locations & evidence
    Role
    supplier
    Products / service
    Process-control and analysis systems
    Documented activity
    World
    Headquarters
    United States
    Why this organization belongs in the System
    • Wafer probe & qualification

      KLA's filing-backed operating portfolio includes process-control and analysis systems; no subregional operating place is asserted, and headquarters is not used as a proxy. Representative status does not imply market rank.

  3. material · public company

    UMC

    United Microelectronics Corporation

    Taiwan-based semiconductor foundry focused on mature and specialty process technologies.

    Roles, locations & evidence
    Role
    manufacturer
    Products / service
    Foundry manufacturing and wafer services · Mature and specialty foundry services
    Documented activity
    Taiwan · Asia
    Headquarters
    Taiwan
    Why this organization belongs in the System
    • Wafer probe & qualification

      UMC's filing-backed operating portfolio includes foundry manufacturing and wafer services; the listed places are explicit role geographies, and headquarters is not used as a proxy. Representative status does not imply market rank.

    • Mature & control-node fabs

      UMC's filing-backed operating portfolio includes mature and specialty foundry services; the listed places are explicit role geographies, and headquarters is not used as a proxy. Representative status does not imply market rank.

  4. representative · public company

    Intel

    Intel Corporation

    Integrated semiconductor company spanning processor design, fabrication, packaging, systems, and foundry services.

    Roles, locations & evidence
    Role
    manufacturer
    Products / service
    Advanced logic fabrication
    Documented activity
    World
    Headquarters
    United States
    Why this organization belongs in the System
    • Leading-edge fab

      Intel's filing-backed operating portfolio includes advanced logic fabrication; no subregional operating place is asserted, and headquarters is not used as a proxy. Representative status does not imply market rank.

All other organizations · 2
  1. representative · public company

    Micron

    Micron Technology, Inc.

    Memory and storage manufacturer supplying DRAM, HBM, NAND, and related products for AI systems.

    Roles, locations & evidence
    Role
    manufacturer
    Products / service
    High-bandwidth memory · DRAM and NAND manufacturing · Operating NAND front-end wafer fabrication · HBM advanced-packaging facility under construction · Leading-edge DRAM fabrication project under construction
    Documented activity
    World · Singapore · Boise
    Headquarters
    Boise
    Why this organization belongs in the System
    • High-bandwidth memory

      Micron's filing-backed operating portfolio includes high-bandwidth memory; no subregional operating place is asserted, and headquarters is not used as a proxy. Representative status does not imply market rank.

    • Memory fabrication

      Micron's filing-backed operating portfolio includes dram and nand manufacturing; no subregional operating place is asserted, and headquarters is not used as a proxy. Representative status does not imply market rank.

    • Memory fabrication

      Micron's 2025 and 2026 Singapore announcements directly identify its current front-end and NAND manufacturing complex. Principal status is withheld because this edition does not close a concentration, capacity, shipment, revenue, or installed-base measure for the role.

    • High-bandwidth memory

      Micron's project updates directly locate the HBM packaging buildout in Singapore and retain its contribution as future, not operating, capacity.

    • Memory fabrication

      NIST's final award record locates Micron's leading-edge DRAM fab program in Boise, and Micron's dated progress statement reports construction milestones on the first fab. The role is emerging because this evidence does not establish operating output.

  2. representative · public company

    TSMC

    Taiwan Semiconductor Manufacturing Company Limited

    Dedicated semiconductor foundry supplying advanced and specialty wafer fabrication and advanced packaging services.

    Roles, locations & evidence
    Role
    manufacturer · operator
    Products / service
    Advanced logic foundry services · Foundry process and yield operations
    Documented activity
    Taiwan · United States
    Headquarters
    Taiwan
    Why this organization belongs in the System
    • Leading-edge fab

      TSMC's filing-backed operating portfolio includes advanced logic foundry services; the listed places are explicit role geographies, and headquarters is not used as a proxy. Representative status does not imply market rank.

    • Yield learning

      TSMC's filing-backed operating portfolio includes foundry process and yield operations; the listed places are explicit role geographies, and headquarters is not used as a proxy. Representative status does not imply market rank.

Affected policies

Relevant policies

Legal status is separated from policy objective. Every record keeps its jurisdiction, mechanism, affected nodes, and verification date.

  1. effective

    U.S. CHIPS and Science Act incentives

    Expand domestic semiconductor manufacturing, research, workforce, and supply-chain resilience.

    Mechanism, scope & sources

    Manufacturing grants, loans and guarantees, research programs, and an investment tax credit with program conditions; current project records distinguish proposed and final awards, with disbursement tied to milestones.

    United StatesOpen full policy record
  2. effective

    European Chips Act

    Strengthen European semiconductor capacity, research leadership, monitoring, and crisis response.

    Mechanism, scope & sources

    Coordinates the Chips for Europe initiative, first-of-a-kind facility support, supply monitoring, and crisis tools; the Commission's Chips Act 2.0 work remains a proposal rather than replacement law.

    European UnionOpen full policy record
  3. effective

    Advanced-semiconductor export controls, as amended

    Restrict specified capabilities used to produce advanced semiconductors and advanced computing systems in China.

    Mechanism, scope & sources

    Combines controlled equipment, software, HBM, entity, end-use, and license requirements with later transaction-specific exceptions and case-by-case review policies in the current EAR framework.

    United States export administrationOpen full policy record

Read this System in the field guide

Continue in the Volumes

Start with three selected readings, or explore the complete reading list.

Start here
  1. 01
    Volume II · PrecisionCleanroom and utilities
  2. 02
    Volume II · PrecisionCycle time and yield learning
  3. 03
    Volume II · PrecisionFab construction and workforce
Complete reading list
Volume II

Precision

6 spreads
  1. II · 01Planarization and clean
  2. II · 02Metrology and inspection
  3. II · 03Cleanroom and utilities
  4. II · 04Cycle time and yield learning
  5. II · 05Fab construction and workforce
  6. II · 06Known-good die and handoff
Related cross-System reading · 21 spreads
Volume I

Matter

7 spreads
  1. I · 01Quartz to polysilicon
  2. I · 02Crystal to wafer
  3. I · 03Gases, resists, and slurries
  4. I · 04Water and contamination
  5. I · 05Steel, concrete, and enclosure
  6. I · 06Qualification and useful life
  7. I · 07Resilience and handoff
Volume II

Precision

7 spreads
  1. II · 01Chiplets, IP, and process rules
  2. II · 02Verification and tape-out
  3. II · 03Masks and pattern data
  4. II · 04DUV and EUV
  5. II · 05The EUV source
  6. II · 06High-NA and optical control
  7. II · 07Deposition, etch, and implantation
Volume III

Package

6 spreads
  1. III · 01Chiplets and partitioning
  2. III · 02How HBM is assembled
  3. III · 03Known-good die
  4. III · 04The assembly sequence
  5. III · 05Inspection, test, and qualification
  6. III · 06Qualification and change control
Volume VII

Permission

1 spreads
  1. VII · 01Semiconductor incentives

Evidence & review

currentEvidence health37 active claims · next review Oct 13, 2026
Active claims
37
Sources
41
High volatility
5
Next review
Oct 13, 2026
Due soon
0
Overdue
0
Superseded
0
Open complete evidence ledger

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